1. Field of the Invention
This invention generally relates to high-speed CMOS integrated circuit fabrication and, more particularly, to a system and method using a strained-silicon channel on silicon germanium for isolating silicon germanium regions of adjoining MOS structures.
2. Description of the Related Art
Silicon germanium (SiGe) materials can be represented with the nomenclature of Si1−xGex, where x is typically less than 1. Strained-silicon MOS transistors are fabricated with both surface channel and buried channel devices. For surface channel strained-silicon devices, strained-Si is deposited on top of a relaxed Si1−xGex layer. For buried channel devices, a layer of strained-Si is interposed between relaxed Si1−xGex layers. Conventionally, such devices use a thick layer of graded Si1−xGex, where x varies from 0 at the bottom, to about 0.3, or more at the top, with a thickness of 1 micron (μm) to 5 μm. A 1 μm to 2 μm layer of relaxed Si1−xGex with a constant germanium concentration is grown on top of the graded Si1−xGex, followed by a strained-Silicon epitaxial layer. A 1 to 5 μm thick graded SiGe layer has many dislocations, so that a top layer of 1 to 2 μm thick relaxed SiGe, with a constant Ge concentration, can be grown. The strained-Silicon layer can be used for the surface channel of a MOS transistor. For buried channel MOS transistors, an additional layer of Si1−xGex is deposited onto the strained-Silicon layer. The above-mentioned SiGe structures can have an enhanced field effective mobility, about 80% higher than that of pure silicon. For a PMOS transistor, an effective hole mobility of 400 cm2/Vs has been obtained. For CMOS, the well boundary may exceed the constant germanium concentration region and reach the graded semi-relaxed Si1−xGex layer.
The defect density in both regions (graded SiGe and constant Ge regions) is high, causing large inter-well junction leakage current. In addition, the band gap of the Si1−xGex is narrower than that of Si. The junction leakage current is proportional to the density of electron-hole generation centers multiplied by the intrinsic carrier density. Therefore, for a given electron-hole generation center density the junction leakage current is proportional to exp[(Ec−Ev)/2 kT], where (Ec−Ev) is the band gap. That is, for a given density of electron-hole generation center, a Si1−xGex junction has a larger leakage current than a Si junction. The well leakage current of CMOS devices made with state-of-the-art graded relaxed Si1−xGex material is very high. Low standby power devices cannot be fabricated with such a structure.
The electron-hole pair generation rate in a depletion region of a semiconductor is:
  U  =                    σ        ⁢                                  ⁢                  v          th                ⁢                  N          t                ⁢                  n          i                            2        ⁢                  cosh          ⁡                      (                                                            E                  i                                -                                  E                  t                                            kT                        )                                =                  σ        ⁢                                  ⁢                  v          th                ⁢                  N          t                ⁢                                            N              c                        ⁢                          N              v                                      ⁢                  ⅇ                                                    (                                                      E                    c                                    -                                      E                    v                                                  )                            /              2                        ⁢            kT                                      2        ⁢                  cosh          ⁡                      (                                                            E                  i                                -                                  E                  t                                            kT                        )                              
where σ is the capture cross-section, vth is the thermal velocity, N, is the electron-hole generation center density, ni is the intrinsic carrier density, Nc and Nv are the state densities at the conduction band and the valence band, respectively, and Ec and Ev are the band edge energy of conduction band and valence band, respectively. Ei=(Ec+Ev)/2 and Ei is the energy of the generation center. The most active generation center is located at Ei. Therefore, the generation current is approximately proportional to Nie(Ec−Ev)/2kT , where k is Boltzmann's constant and T is temperature. A generation center is usually associated with a defect state. It is well known that the defect density in a typical graded relaxed Si1−xGex layer is larger than 1×106/cm8. Therefore, the leakage current of a junction formed in either relaxed or strained-Si1−xGex is large.
It would be advantageous if a CMOS device could be fabricated that had a high defect density, but with a low leakage current.
It would be advantageous if a low leakage current CMOS device could be fabricated using SiGe.